Implementing the Functional Model of High Accuracy Fixed Width Modified Booth Multiplier

The sustained growth in VLSI technology is fuelled by the continued shrinking of transistor to ever smaller dimension. The benefits of miniaturization are high packing densities, high circuit speed and low power dissipation. Binary multiplier is an electronic circuit used in digital electronics such as a computer to multiply two binary numbers, which is built using a binary adder. A fixed-width multiplier is attractive to many multimedia and digital signal processing systems which are desirable to maintain a fixed format and allow a minimum accuracy loss to output data. This paper presents the design of high-accuracy fixed-width modified Booth multipliers using Carry Look ahead Adder. The high accuracy fixed width modified booth multiplier is used to satisfy the needs of the applications like digital filtering, arithmetic coding, wavelet transformation, echo cancellation, etc. The high accuracy fixed width modified booth multipliers can also be applicable to lossy applications to reduce the area and power consumption of the whole system while maintaining good output quality. Keywords--Booth Encoder, Partial product generator, Fixed-width multiplier, Modified Booth multiplier, Compression tree, Carry Look ahead Adder.